1. Field of the Invention
The present invention is directed in general to data communications. In one aspect, the present invention relates to a method and system for improving data transfer between a plurality of processors on a single integrated circuit.
2. Related Art
As is known, communication technologies that link electronic devices may use multiprocessor switching devices to route and process signal information. Some communication technologies interface a one or more processor devices for processing packet-based signals in a network of computer systems. Generally, packets are used to communicate among networked computer and electronic systems. Thus, each networked system must receive and transmit packets, and must process the packets directed to that system to determine what is being transmitted to that system.
Typically, each computer system includes one or more interfaces or ports on which packets are transmitted and received. Additionally, each interface generally includes a dedicated DMA engine used to transmit received packets to memory in the system and to read packets from the memory for transmission. If a given system includes two or more packet interfaces, the system includes DMA engines for each interface. Where a computer system processes multiple packet channels using the DMA engines, the processor(s) in the system must be able to monitor the status of the DMA transfers for each channel and other system-related functions associated with the channel transfers.
As the number of processors incorporated into a multiprocessor integrated circuit increases, it is difficult to manage data traffic between the processors on a single bus running certain protocols, such as a “snoopy” protocol. In particular, it is difficult to maintain a coherent memory architecture beyond a certain number of processors because such bus structures do not scale well. In view of the foregoing, there is a need for a method and apparatus for improving management of data exchanged between processors in a multiprocessor integrated circuit.